1. Field of the Invention
The present invention relates to a digital-to-analog converter (DAC), and more particularly to, a DAC suitably used in particularly an image display apparatus, such as a liquid crystal display or the like.
2. Description of the Related Art
As a conventional DAC for a liquid crystal display, there is a known DAC which has a reference voltage generating circuit, a selection circuit having a plurality of switch pairs, and a voltage follower. Specifically, when the DAC receives a 6-bit digital signal as an input code, the reference voltage generating circuit comprises 32 resistance elements which are connected in series, and supplies 33 reference voltages different from each other to the selection circuit from the terminals of the respective resistance elements. The selection circuit comprises 37 switch pairs each of which selects one of two inputs in accordance with a corresponding bit of the input code. If the input code is odd, two reference voltages adjacent to each other are selected from the 33 reference voltages. If the input code is even, one reference voltage is duplicately selected from the 33 reference voltages. These voltages are supplied to the voltage follower. The voltage follower outputs an average value of the two supplied voltages as an analog signal. In other words, when the input code is odd, an intermediate voltage between two adjacent reference voltages is generated by the voltage follower (see U.S. Pat. No. 6,373,419).
In the conventional DAC above, as the number of input bits (resolution) is increased from 6 to 8 or 10, the number of reference voltages to be generated is dramatically increased from 33 to 129 or 513, so that the number of switch pairs required for the selection circuit is increased from 37 to 135 or 521.
In view of the current trend toward a higher resolution and a larger number of gray levels for liquid crystal displays, the chip size of the DAC needs to be increased when the conventional technique above is used.